/*
 * Copyright (C) 2017 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See http://www.gnu.org/licenses/gpl-2.0.html for more details.
 */

/* This file is generated by GenLP_setting.pl v1.5.7 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>

const unsigned int AP_DCM_Golden_Setting_tcl_gs_dpidle_data[] = {
/*  Address     Mask        Golden Setting Value */
	0x0C53A2A0, 0x03000800, 0x03000800,/* CPU_PLLDIV_CFG0 */
	0x0C53A2A4, 0x03000800, 0x03000800,/* CPU_PLLDIV_CFG1 */
	0x0C53A2E0, 0x83000800, 0x83000800,/* BUS_PLLDIV_CFG */
	0x0C53A418, 0x00000001, 0x00000000,/* MCSI_CFG2 */
	0x0C53A440, 0x0000FFFF, 0x0000FFFF,/* MCSIC_DCM0 */
	0x0C53A510, 0x00270000, 0x00270000,/* MP_ADB_DCM_CFG4 */
	0x0C53A518, 0x0000003F, 0x0000003F,/* MP_MISC_DCM_CFG0 */
	0x0C53A5C0, 0x00070100, 0x00070100,/* MCUSYS_DCM_CFG0 */
	0x0C53A900, 0x00000005, 0x00000005,/* EMI_WFIFO */
	0x0C53C880, 0x0001000F, 0x0001000F,/* MP0_DCM_CFG0 */
	0x0C53C89C, 0x00000011, 0x00000011,/* MP0_DCM_CFG7 */
	0x0D0A007C, 0x00000002, 0x00000000,/* dbg_mode */
	0x10001070, 0x40907FFB, 0x40900603,/* INFRA_BUS_DCM_CTRL */
	0x10001074, 0x703FFFFB, 0x703F83E3,/* PERI_BUS_DCM_CTRL */
	0x10001078, 0x08000000, 0x08000000,/* MEM_DCM_CTRL */
	0x100010A0, 0x0000000F, 0x00000000,/* P2P_RX_CLK_ON */
	0x10001A30, 0x0007F000, 0x00030000,/* INFRA_AXIMEM_IDLE_BIT_EN_0 */
	0x10002028, 0x0000147E, 0x0000147E,/* INFRA_EMI_DCM_CFG0 */
	0x1000202C, 0xFFFFFFFF, 0x4078C000,/* INFRA_EMI_DCM_CFG1 */
	0x10002034, 0xFFFFFFFF, 0x000000FF,/* INFRA_EMI_DCM_CFG3 */
	0x10002038, 0xFFFFFFFF, 0x00000007,/* TOP_CK_ANCHOR_CFG */
	0x1000A000, 0x80000000, 0x80000000,/* SEJ_CON */
	0x1000D1EC, 0x007FFFFF, 0x00000000,/* DCM_EN */
	0x1001A208, 0x0000FFFF, 0x0000FFFF,/* DXCC_NEW_HWDCM_CFG */
	0x10212048, 0x00000001, 0x00000001,/* CQ_DMA_G_DMA_0_DCM_EN */
	0x102120C8, 0x00000001, 0x00000001,/* CQ_DMA_G_DMA_1_DCM_EN */
	0x10212148, 0x00000001, 0x00000001,/* CQ_DMA_G_DMA_2_DCM_EN */
	0x10219060, 0xFF000000, 0x00000000,/* EMI_CONM */
	0x10219068, 0xFF000000, 0x00000000,/* EMI_CONN */
	0x10219830, 0x00002000, 0x00000000,/* EMI_THRO_CTRL0 */
	0x10220050, 0x007FFFFF, 0x00000000,/* MMU_DCM_DIS */
	0x102280F0, 0x0000FFFF, 0x0000FFFF,/* GCE_CTL_INT0 */
	0x10230038, 0xC4000007, 0xC0000007,/* DRAMC_PD_CTRL */
	0x1023003C, 0x80000000, 0x80000000,/* CLKAR */
	0x10235008, 0xFF000000, 0x00000000,/* CHN_EMI_CONB */
	0x10238284, 0x000BFF00, 0x00000000,/* MISC_CG_CTRL0 */
	0x1023828C, 0x07E000C0, 0x01000000,/* MISC_CG_CTRL2 */
	0x102382A4, 0x00000003, 0x00000000,/* MISC_CTRL2 */
	0x10240038, 0xC4000007, 0xC0000007,/* DRAMC_PD_CTRL */
	0x1024003C, 0x80000000, 0x80000000,/* CLKAR */
	0x10248284, 0x000BFF00, 0x00000000,/* MISC_CG_CTRL0 */
	0x1024828C, 0x07E000C0, 0x01000000,/* MISC_CG_CTRL2 */
	0x102482A4, 0x00000003, 0x00000000,/* MISC_CTRL2 */
	0x1024F050, 0x007FFFFF, 0x00000000,/* MMU_DCM_DIS */
	0x10254300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x10255300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x10256300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x10443004, 0x00000100, 0x00000100,/* SSPM_MCLK_DIV */
	0x10443008, 0x001FFFFF, 0x001FBFFF,/* SSPM_DCM_CTRL */
	0x105C5F88, 0x00000007, 0x00000007,/* I3C0_CHN_HW_CG_EN */
	0x105C6F88, 0x00000007, 0x00000007,/* I2C1_CHN_HW_CG_EN */
	0x11000020, 0x00FFFFFF, 0x00FFFFFF,/* AP_DMA_MD_INT_EN */
	0x11200950, 0x01000000, 0x01000000,/* HDMA_CFG */
	0x11203E00, 0x00010000, 0x00010000,/* SSUSB_IP_PW_CTRL0 */
	0x11203E04, 0x00000001, 0x00000001,/* SSUSB_IP_PW_CTRL1 */
	0x11203E08, 0x00000001, 0x00000001,/* SSUSB_IP_PW_CTRL2 */
	0x11203E0C, 0x00000001, 0x00000001,/* SSUSB_IP_PW_CTRL3 */
	0x11203E30, 0x0000000A, 0x0000000A,/* SSUSB_U3_CTRL_0P */
	0x11203E50, 0x0000000A, 0x0000000A,/* SSUSB_U2_CTRL_0P */
	0x11203E88, 0x00000003, 0x00000003,/* SSUSB_CSR_CK_CTRL */
	0x11203E8C, 0x0000001F, 0x0000001F,/* SSUSB_REF_CK_CTRL */
	0x11210000, 0x60000000, 0x60000000,/* AUDIO_TOP_CON0 */
	0x112300B4, 0xFFA00000, 0x00000000,/* PATCH_BIT1 */
	0x112400B4, 0xFFA00000, 0x00000000,/* PATCH_BIT1 */
	0x11C10480, 0x00000007, 0x00000007,/* DCM_ON */
	0x13FBF020, 0x03800000, 0x03800000,/* MFG_ASYNC_CON */
	0x13FBF024, 0x00000001, 0x00000001,/* MFG_ASYNC_CON_1 */
	0x13FBF0B0, 0x00001000, 0x00000000,/* MFG_GLOBAL_CON */
	0x14000120, 0x7FFFFFFF, 0x00000000,/* MMSYS_HW_DCM_1ST_DIS0 */
	0x14000130, 0x0FFFFFFF, 0x00000000,/* MMSYS_HW_DCM_2ND_DIS0 */
	0x14017014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x14018014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x14019300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x140211F0, 0xFFFFFFFF, 0x00000000,/* DISP_POSTMASK_FUNC_DCM0 */
	0x140211F4, 0xFFFFFFFF, 0x00000000,/* DISP_POSTMASK_FUNC_DCM1 */
	0x15021014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x1502F014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x16000018, 0x00000001, 0x00000000,/* VDEC_DCM_CON */
	0x16010014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x17010014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x17030300, 0x00000001, 0x00000000,/* JPGENC_DCM_CTRL */
	0x19000010, 0x00700009, 0x00100009,/* APU_CONN_APB_CTRL */
	0x1900001C, 0x00000001, 0x00000000,/* APU_CONN_AXI_CTRL1 */
	0x1A001014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x1A002014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
};

const unsigned int *AP_DCM_Golden_Setting_tcl_gs_dpidle =
		AP_DCM_Golden_Setting_tcl_gs_dpidle_data;

unsigned int AP_DCM_Golden_Setting_tcl_gs_dpidle_len = 255;

const unsigned int AP_DCM_Golden_Setting_tcl_gs_suspend_data[] = {
/*  Address     Mask        Golden Setting Value */
	0x0C53A2A0, 0x03000800, 0x03000800,/* CPU_PLLDIV_CFG0 */
	0x0C53A2A4, 0x03000800, 0x03000800,/* CPU_PLLDIV_CFG1 */
	0x0C53A2E0, 0x83000800, 0x83000800,/* BUS_PLLDIV_CFG */
	0x0C53A418, 0x00000001, 0x00000000,/* MCSI_CFG2 */
	0x0C53A440, 0x0000FFFF, 0x0000FFFF,/* MCSIC_DCM0 */
	0x0C53A510, 0x00270000, 0x00270000,/* MP_ADB_DCM_CFG4 */
	0x0C53A518, 0x0000003F, 0x0000003F,/* MP_MISC_DCM_CFG0 */
	0x0C53A5C0, 0x00070100, 0x00070100,/* MCUSYS_DCM_CFG0 */
	0x0C53A900, 0x00000005, 0x00000005,/* EMI_WFIFO */
	0x0C53C880, 0x0001000F, 0x0001000F,/* MP0_DCM_CFG0 */
	0x0C53C89C, 0x00000011, 0x00000011,/* MP0_DCM_CFG7 */
	0x0D0A007C, 0x00000002, 0x00000000,/* dbg_mode */
	0x10001070, 0x40907FFB, 0x40900603,/* INFRA_BUS_DCM_CTRL */
	0x10001074, 0x703FFFFB, 0x703F83E3,/* PERI_BUS_DCM_CTRL */
	0x10001078, 0x08000000, 0x08000000,/* MEM_DCM_CTRL */
	0x100010A0, 0x0000000F, 0x00000000,/* P2P_RX_CLK_ON */
	0x10001A30, 0x0007F000, 0x00030000,/* INFRA_AXIMEM_IDLE_BIT_EN_0 */
	0x10002028, 0x0000147E, 0x0000147E,/* INFRA_EMI_DCM_CFG0 */
	0x1000202C, 0xFFFFFFFF, 0x4078C000,/* INFRA_EMI_DCM_CFG1 */
	0x10002034, 0xFFFFFFFF, 0x000000FF,/* INFRA_EMI_DCM_CFG3 */
	0x10002038, 0xFFFFFFFF, 0x00000007,/* TOP_CK_ANCHOR_CFG */
	0x1000A000, 0x80000000, 0x80000000,/* SEJ_CON */
	0x1000D1EC, 0x007FFFFF, 0x00000000,/* DCM_EN */
	0x1001A208, 0x0000FFFF, 0x0000FFFF,/* DXCC_NEW_HWDCM_CFG */
	0x10212048, 0x00000001, 0x00000001,/* CQ_DMA_G_DMA_0_DCM_EN */
	0x102120C8, 0x00000001, 0x00000001,/* CQ_DMA_G_DMA_1_DCM_EN */
	0x10212148, 0x00000001, 0x00000001,/* CQ_DMA_G_DMA_2_DCM_EN */
	0x10219060, 0xFF000000, 0x00000000,/* EMI_CONM */
	0x10219068, 0xFF000000, 0x00000000,/* EMI_CONN */
	0x10219830, 0x00002000, 0x00000000,/* EMI_THRO_CTRL0 */
	0x10220050, 0x007FFFFF, 0x00000000,/* MMU_DCM_DIS */
	0x102280F0, 0x0000FFFF, 0x0000FFFF,/* GCE_CTL_INT0 */
	0x10230038, 0xC4000007, 0xC0000007,/* DRAMC_PD_CTRL */
	0x1023003C, 0x80000000, 0x80000000,/* CLKAR */
	0x10235008, 0xFF000000, 0x00000000,/* CHN_EMI_CONB */
	0x10238284, 0x000BFF00, 0x00000000,/* MISC_CG_CTRL0 */
	0x1023828C, 0x07E000C0, 0x01000000,/* MISC_CG_CTRL2 */
	0x102382A4, 0x00000003, 0x00000000,/* MISC_CTRL2 */
	0x10240038, 0xC4000007, 0xC0000007,/* DRAMC_PD_CTRL */
	0x1024003C, 0x80000000, 0x80000000,/* CLKAR */
	0x10248284, 0x000BFF00, 0x00000000,/* MISC_CG_CTRL0 */
	0x1024828C, 0x07E000C0, 0x01000000,/* MISC_CG_CTRL2 */
	0x102482A4, 0x00000003, 0x00000000,/* MISC_CTRL2 */
	0x1024F050, 0x007FFFFF, 0x00000000,/* MMU_DCM_DIS */
	0x10254300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x10255300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x10256300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x10443004, 0x00000100, 0x00000100,/* SSPM_MCLK_DIV */
	0x10443008, 0x001FFFFF, 0x001FBFFF,/* SSPM_DCM_CTRL */
	0x105C5F88, 0x00000007, 0x00000007,/* I3C0_CHN_HW_CG_EN */
	0x105C6F88, 0x00000007, 0x00000007,/* I2C1_CHN_HW_CG_EN */
	0x11000020, 0x00FFFFFF, 0x00FFFFFF,/* AP_DMA_MD_INT_EN */
	0x11200950, 0x01000000, 0x01000000,/* HDMA_CFG */
	0x11203E00, 0x00010000, 0x00010000,/* SSUSB_IP_PW_CTRL0 */
	0x11203E04, 0x00000001, 0x00000001,/* SSUSB_IP_PW_CTRL1 */
	0x11203E08, 0x00000001, 0x00000001,/* SSUSB_IP_PW_CTRL2 */
	0x11203E0C, 0x00000001, 0x00000001,/* SSUSB_IP_PW_CTRL3 */
	0x11203E30, 0x0000000A, 0x0000000A,/* SSUSB_U3_CTRL_0P */
	0x11203E50, 0x0000000A, 0x0000000A,/* SSUSB_U2_CTRL_0P */
	0x11203E88, 0x00000003, 0x00000003,/* SSUSB_CSR_CK_CTRL */
	0x11203E8C, 0x0000001F, 0x0000001F,/* SSUSB_REF_CK_CTRL */
	0x11210000, 0x60000000, 0x60000000,/* AUDIO_TOP_CON0 */
	0x112300B4, 0xFFA00000, 0x00000000,/* PATCH_BIT1 */
	0x112400B4, 0xFFA00000, 0x00000000,/* PATCH_BIT1 */
	0x11C10480, 0x00000007, 0x00000007,/* DCM_ON */
	0x13FBF020, 0x03800000, 0x03800000,/* MFG_ASYNC_CON */
	0x13FBF024, 0x00000001, 0x00000001,/* MFG_ASYNC_CON_1 */
	0x13FBF0B0, 0x00001000, 0x00000000,/* MFG_GLOBAL_CON */
	0x14000120, 0x7FFFFFFF, 0x00000000,/* MMSYS_HW_DCM_1ST_DIS0 */
	0x14000130, 0x0FFFFFFF, 0x00000000,/* MMSYS_HW_DCM_2ND_DIS0 */
	0x14017014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x14018014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x14019300, 0x000000FE, 0x00000000,/* SMI_DCM */
	0x140211F0, 0xFFFFFFFF, 0x00000000,/* DISP_POSTMASK_FUNC_DCM0 */
	0x140211F4, 0xFFFFFFFF, 0x00000000,/* DISP_POSTMASK_FUNC_DCM1 */
	0x15021014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x1502F014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x16000018, 0x00000001, 0x00000000,/* VDEC_DCM_CON */
	0x16010014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x17010014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x17030300, 0x00000001, 0x00000000,/* JPGENC_DCM_CTRL */
	0x19000010, 0x00700009, 0x00100009,/* APU_CONN_APB_CTRL */
	0x1900001C, 0x00000001, 0x00000000,/* APU_CONN_AXI_CTRL1 */
	0x1A001014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
	0x1A002014, 0x0000FFF0, 0x0000FFF0,/* SMI_LARB_CON_SET */
};

const unsigned int *AP_DCM_Golden_Setting_tcl_gs_suspend =
		AP_DCM_Golden_Setting_tcl_gs_suspend_data;

unsigned int AP_DCM_Golden_Setting_tcl_gs_suspend_len = 255;

const unsigned int AP_DCM_Golden_Setting_tcl_gs_sodi_data[] = {
/*  Address     Mask        Golden Setting Value */
	0x0D0A007C, 0x00000002, 0x00000000,/* dbg_mode */
	0x1000D1EC, 0x007FFFFF, 0x00000000,/* DCM_EN */
	0x1001A208, 0x0000FFFF, 0x0000FFFF,/* DXCC_NEW_HWDCM_CFG */
	0x10219060, 0xFF000000, 0x00000000,/* EMI_CONM */
	0x10219068, 0xFF000000, 0x00000000,/* EMI_CONN */
	0x10219830, 0x00002000, 0x00000000,/* EMI_THRO_CTRL0 */
	0x10220050, 0x007FFFFF, 0x00000000,/* MMU_DCM_DIS */
	0x10235008, 0xFF000000, 0x00000000,/* CHN_EMI_CONB */
	0x10238284, 0x000BFF00, 0x00000000,/* MISC_CG_CTRL0 */
	0x1023828C, 0x07E000C0, 0x01000000,/* MISC_CG_CTRL2 */
	0x102382A4, 0x00000003, 0x00000000,/* MISC_CTRL2 */
	0x10248284, 0x000BFF00, 0x00000000,/* MISC_CG_CTRL0 */
	0x1024828C, 0x07E000C0, 0x01000000,/* MISC_CG_CTRL2 */
	0x102482A4, 0x00000003, 0x00000000,/* MISC_CTRL2 */
	0x1024F050, 0x007FFFFF, 0x00000000,/* MMU_DCM_DIS */
	0x112300B4, 0xFFA00000, 0x00000000,/* PATCH_BIT1 */
	0x112400B4, 0xFFA00000, 0x00000000,/* PATCH_BIT1 */
	0x11C10480, 0x00000007, 0x00000007,/* DCM_ON */
	0x14000120, 0x7FFFFFFF, 0x00000000,/* MMSYS_HW_DCM_1ST_DIS0 */
	0x14000130, 0x0FFFFFFF, 0x00000000,/* MMSYS_HW_DCM_2ND_DIS0 */
	0x140211F0, 0xFFFFFFFF, 0x00000000,/* DISP_POSTMASK_FUNC_DCM0 */
	0x140211F4, 0xFFFFFFFF, 0x00000000,/* DISP_POSTMASK_FUNC_DCM1 */
	0x16000018, 0x00000001, 0x00000000,/* VDEC_DCM_CON */
	0x17030300, 0x00000001, 0x00000000,/* JPGENC_DCM_CTRL */
	0x19000010, 0x00700009, 0x00100009,/* APU_CONN_APB_CTRL */
	0x1900001C, 0x00000001, 0x00000000,/* APU_CONN_AXI_CTRL1 */
};

const unsigned int *AP_DCM_Golden_Setting_tcl_gs_sodi =
		AP_DCM_Golden_Setting_tcl_gs_sodi_data;

unsigned int AP_DCM_Golden_Setting_tcl_gs_sodi_len = 78;
